ecsumicroprocessorsf06

 

ECSU Microprocessors Fall06

Page history last edited by Anonymous 3 yrs ago

CSC480: Microprocessor Design and SoC Concepts

 

MWF By arrangement

 

 

A. Project Title: CSC480: Microprocessor Design and SoC Concepts

 

B. Course Summary and Objectives

In this course the student will design and fabricate a microprocessor and work with test and

verification procedures common in SoC (System on a Chip) prototyping. The course will cover both

theoretical and practical elements of Microprocessor and SoC design.

 

The student will implement a microprocessor in HDL (Verilog) and download the resulting

architecture into Xilinx Field Programmable Gate Arrays (FPGAs). The objective is to expose the

students to aspects of microprocessor design. This course is standard in undergraduate programs

with a concentration in hardware design.

 

C. Text

David J. Lilja and Sachin S. Sapatnekar, 'Designing Digital Systems with Verilog', ISBN: 0-521-82866-X

Text Website [ http://www.cambridge.org/052182866X ] and [ http://www.arctic.umn.edu/vespa/ ]

 

Additional References

 

Michael D. Ciletti, ' Advanced Digital Design with the Verilog HDL', ISBN: 0-13-089161-4

Douglas J. Smith, ' HDL Chip Design (VHDL and Verilog)', ISBN: 0-9651934-3-8

 

D. Outline of how the project will be conducted/Syllabus

The student will work through all of the chapters in course text, and in parallel

test the design by constructing Verilog HDL description of the processor that is placed

in the Xilinx FPGA.

 

D1. Controlling Complexity

D2. Introduction to Verilog

D3. Defining the Instruction Set Architecture

Test 1/Evaluation of First Stage of Implementation

D4. Algorithmic Behavioral Modeling

D5. Building an assembler for VeSPA

D6. Pipelining

Test 2/Evaluation of the Second Stage of Implementation

D7. Implementation of the pipelined processor

D8. Verification

D9. Final Project in Processor Interfacing

 

E. Outline of how the project will be evaluated.

The student grade will be accessed 50% on the 2 tests, and 50% on the implementation of

the VeSPA processor.

 

Outside Resources

Verilog [ http://en.wikipedia.org/wiki/Verilog ]

Xilinx [ http://en.wikipedia.org/wiki/Xilinx ]

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